Program Director, IMEC


James Myers holds the MEng degree in Electrical and Electronic Engineering from Imperial College, London.

He spent 15 years at Arm, leading research from low power circuits and systems, through printed electronics, to DTCO activities. He joined imec in 2022 to start a new UK site and lead the System Technology Co-optimization research program, with the aim to build upon established DTCO practices to overcome the numerous scaling challenges foreseen for future systems. James holds 60 patents, has taped out 20 SoCs, has presented at ISSCC and VLSI Symposium, and has published in IEDM and Nature.

Presentation: Extending the CMOS technology roadmap with system technology co-optimization

The world expects that future SoCs will continue to get faster, more efficient and more capable. But how can we deliver this with CMOS technology scaling getting harder with every generation? Imec has led the way in using design technology co-optimization (DTCO) to successfully enable equivalent scaling through technology boosters such as backside power delivery. Next must come system technology co-optimization (STCO) but this will require agile new top-down methodology, that picks among a large set of competing technology options to deliver system level benefits. A key challenge for STCO is when addressing the broader compute system scaling we must consider a variety of applications, their implementation constraints and specific workloads. For example what helps a large scale-out GPU perform faster AI training is unlikely to help a small battery-constrained wearable device run AI inference. So how can STCO extend the CMOS technology roadmap? This presentation will share imec’s STCO program strategy and UK collaboration ambitions.