Verification and Validation UML models

GrantrMembers, Past Events, Uncategorised

UML modelling tools enable a visual development environment for systems engineers and software developers creating real-time or embedded systems and software. These tools can auto-generate software code in various languages.

Many Verification and Validation (V&V) tools exist but how well integrated are these with your UML tools or associated design flows?
This network event will provide an opportunity for users to share their experiences with industry peers and experts along with demos from some of the tool providers.

All available presentations can be downloaded HERE : UML2012

  • Ian Anderson – SELEX Galileo SELEX Welcome, Objective of the workshop
  • Terry Gregson / Charlie Lane – SELEX-Galileo “SELEX Galileo’sexperience of V&V Tools for UML”
  • Karen Yorav – IBM Research  “Formal Verification for UML behavioural models”
  • Jason Wylie – Thales Submarine Sonar Systems “UML Modelling at Thales”
  • Mark Pitchford – LDRA  “From the Model to the Target – A Guide to Using Model Based Development in Embedded Real-time Environments”
  • Rob Burton – SELEX Galileo “V&V Planning”
  • Anders Holmberg – IAR Systems “UML state machines and formal verification “
  • Dr Cuong Tran – University of Manchester “X-Man – Scalable Design and Verification of Component-based Systems”
  • Fish Bowl Debate – “How can we reduce defects in auto-generated code?”

This event was hosted and sponsored by SELEX Galileo

Thanks to our sponsor:   Atego

Thanks to our exhibitors:

IAR Systems
LDRA
Programming Research
Vector Software