NMI ICCV 2009: 2nd International Conference “Living with CMOS Variability”

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Speakers at Europe’s second international conference on CMOS variability ( ICCV09 ) were unanimously agreed that the global semiconductor industry could and would evolve to successfully tackle the challenges presented by CMOS variability at process geometries of 45nm and below.
Hosted at Savoy Place, London by The National Microelectronics Institute (NMI), in collaboration with the UK’s nanoCMOS Consortium, ICCV 2009 “Living with Variability” attracted expert speakers from around the world and an international audience representing chip designers, manufacturers and tool vendors. It was clear from the conference that all participants recognised that CMOS variability was very much a real world issue and that new approaches to design and manufacture were required and achievable. It was also accepted that it was an issue that no one party could address in isolation and clearly global events like ICCV09 are vital in bringing together industry communities to promote dialog, debate and consensus.

ICCV2009 – Day 1 12th May 2009
Paul Jarvie, National Microelectronics Institute, “Welcome to ICCV2009”

SESSION 1

  • Key Note: Dr Kelin Kuhn ,Intel, “Variation in 45nm and implications for 32nm and beyond”
  • Krisztian Flautner, ARM , “Life on the Treadmill”
  • Professor Asen Asenov, University of Glasgow ,”Statistical variability and reliability in the next generation CMOS technologies and the ITRS response”

SESSION 2:

  • Key Note: Dr Sani Nassif, IBM, “Variability beyond 45nm: design impact and countermeasures”
  • Davide Pandini , ST Microelectronics, “Statistical Static Timing Analysis: A New Approach to Deal with Increased Process Variability in Advanced Nanometer Technologies”
  • Nam Sung Kim, Chartered Semiconductors , “SRAM Variability: Foundry Perspectives”

ICCV2009 – Day 2 12th & 13th May
Paul Jarvie, National Microelectronics Institute, “Welcome to ICCV2009”

SESSION 1:

  • Key Note: Jean-Marie Brunet, Mentor Graphics,“Managing Variability in next generation design methodologies and tools ”
  • Andrew Appleby, NXP Semiconductors, “Realising a 45nm System on Chip for digital TV in the age of variability”
  • Dr. Ahsan Bootehsaz , Synopsys, “Designing with variability: An EDA perspective”
  • Miguel Miranda, IMEC, “Design for Variability efforts in Europe – REALITY project “

SESSION 2:

  • Sharad Saxena , PDF Solutions, “Variability Characterization Infrastructure for Nanometer-Scale Technologies”
  • Philippe Hurat, Cadence, “Analyzing, preventing and correcting the impact of manufacturing variation in advanced node IC design, including physical and electrical effects induced by Litho, CMP and Stress
  • Jeff Watt, Altera, “Variability-Aware Product Development in a Fabless Environment”
  • Patrick Drennan, Solido Design Automation, “Design for Variability in Analog / Mixed-Signal Circuits”